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authorMarius Bakke <mbakke@fastmail.com>2019-11-15 20:11:35 +0100
committerMarius Bakke <mbakke@fastmail.com>2019-11-15 20:11:35 +0100
commitf056553c6b8ffa36f4ce9fb1c3602a8f4b1de242 (patch)
tree80c815216a3717cf00b615c9cb8840c113eaf79f /gnu/packages/fpga.scm
parent2c9d34166983565120f831284df57a07e2edd2f9 (diff)
parent528b52390d216d8a8cd13dfcd1e6e40a6448e6c2 (diff)
downloadguix-f056553c6b8ffa36f4ce9fb1c3602a8f4b1de242.tar.gz
Merge branch 'master' into staging
Diffstat (limited to 'gnu/packages/fpga.scm')
-rw-r--r--gnu/packages/fpga.scm4
1 files changed, 2 insertions, 2 deletions
diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index b4f259bf3a..556eae3624 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -120,7 +120,7 @@ For synthesis, the compiler generates netlists in the desired format.")
 (define-public yosys
   (package
     (name "yosys")
-    (version "0.8")
+    (version "0.9")
     (source (origin
               (method git-fetch)
               (uri (git-reference
@@ -129,7 +129,7 @@ For synthesis, the compiler generates netlists in the desired format.")
                     (recursive? #t))) ; for the ‘iverilog’ submodule
               (sha256
                 (base32
-                   "1qwbp8gynlklawzvpa4gdn2x0hs8zln0s3kxjqkhfcjfxffdcpvv"))
+                   "0lb9r055h8y1vj2z8gm4ip0v06j5mk7f9zx9gi67kkqb7g4rhjli"))
               (file-name (git-file-name name version))
               (modules '((guix build utils)))
               (snippet