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| author | Michael Forney <mforney@mforney.org> | 2021-03-25 13:51:25 -0700 |
|---|---|---|
| committer | Quentin Carbonneaux <quentin@c9x.me> | 2021-10-25 18:41:57 +0200 |
| commit | 5dbc5dc2c9816821db6e7f1a2903c54a7d549efd (patch) | |
| tree | e705923aedc7552952606ce8623df33fd93628b7 /arm64 | |
| parent | 542825d1f48cd1037c76e12fd5a14b6a91422cf6 (diff) | |
| download | roux-5dbc5dc2c9816821db6e7f1a2903c54a7d549efd.tar.gz | |
arm64: handle copy of constant to slot
If registers spill onto the stack, we may end up with SSA like S320 =l copy 0 after rega(). Handle this case in arm64 emit().
Diffstat (limited to 'arm64')
| -rw-r--r-- | arm64/emit.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arm64/emit.c b/arm64/emit.c index f48dbee..eda1079 100644 --- a/arm64/emit.c +++ b/arm64/emit.c @@ -308,9 +308,15 @@ emitins(Ins *i, E *e) if (req(i->to, i->arg[0])) break; if (rtype(i->to) == RSlot) { - if (rtype(i->arg[0]) == RSlot) { + switch (rtype(i->arg[0])) { + case RSlot: emitf("ldr %?, %M0\n\tstr %?, %M=", i, e); - } else { + break; + case RCon: + loadcon(&e->fn->con[i->arg[0].val], R18, i->cls, e->f); + emitf("str %?, %M=", i, e); + break; + default: assert(isreg(i->arg[0])); emitf("str %0, %M=", i, e); } |