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2015-09-15the only wrong use count is the one of rQuentin Carbonneaux
2015-09-15I forgot cmp as flag setting instruction!Quentin Carbonneaux
2015-09-15jez becomes jnz, complete cmp+jmp contractionQuentin Carbonneaux
2015-09-15implement smarter compare+branchQuentin Carbonneaux
2015-09-15split cmp in two sizesQuentin Carbonneaux
2015-09-15get rid of the iteration macroQuentin Carbonneaux
2015-09-15fix two bugs in iselQuentin Carbonneaux
2015-09-15fix 2 bad bugs in rega and improve substractionQuentin Carbonneaux
The substraction contrained the register allocator to allocate a different register for the result and the second operand, now, we use a neg trick to compile it down. The machinery that was setup is, regardless, interesting and will have to be used for floating point computations (division). The first bug in rega made broke the explicited loop invariant: we were using register allocation unavailable information from other blocks. It's still unclear how we got wrong results from that considering mappings are all 0-initialized. The second bug is a stupid one, one sizeof operator was missing from a memcpy...
2015-09-15use nreg only when != NRegQuentin Carbonneaux
2015-09-15use a temporary for constant comparisonsQuentin Carbonneaux
2015-09-15fix limit bug in spillQuentin Carbonneaux
I think this was not a big issue because the register allocator does not consume a register when it encounters obviously dead code.
2015-09-15remove useless TODO for nowQuentin Carbonneaux
2015-09-15quick fix for comparisons with constantsQuentin Carbonneaux
2015-09-15start work on comparisonsQuentin Carbonneaux
There are two things I overlooked so far. 1. Binary instructions like cmp that do not have a result in registers need the size suffix sometimes, for example when comparing a spill location with a constant. 2. The register allocator needs to be adapted to support the comparison instruction: it is not possible to compare two spill locations without using a register.
2015-09-15use cmp $0, it works with spill slotsQuentin Carbonneaux
2015-09-15use correct sizes during reg allocationQuentin Carbonneaux
2015-09-15print registers with numbersQuentin Carbonneaux
2015-09-15adapt emit to new Ref settingQuentin Carbonneaux
2015-09-15use regs of the correct type in iselQuentin Carbonneaux
2015-09-15use a new Ref type for registersQuentin Carbonneaux
This might not be a good idea, the problem was that many spurious registers would be added to the Bits data-structures during compilation (and would always remain 0). However, doing the above modification de-uniformizes the handling of temps and regs, this makes the code longer and not really nicer. Also, additional Bits structures are required to track the registers independently. Overall this might be a bad idea to revert.
2015-09-15patch isel to use symbol typesQuentin Carbonneaux
2015-09-15silence clang warningQuentin Carbonneaux
2015-09-15avoid name conflicts in enumsQuentin Carbonneaux
2015-09-15start change of representation for registersQuentin Carbonneaux
2015-09-15start work on word/long handlingQuentin Carbonneaux
2015-09-15replace IA with X for x64 instructionsQuentin Carbonneaux
2015-09-15avoid keyword clash by using cons for constantsQuentin Carbonneaux
2015-09-15cosmetic modifications to parse.cQuentin Carbonneaux
2015-09-15clean the commutativity + fix bug in emitQuentin Carbonneaux
The commutativity information only makes sense for arithmetic expressions. To account for that, I introduced a new tri-valued boolean type B3. Memory operations, for example, will receive an undefined commutativity trit. The code emitter was buggy when rega emitted instructions like 'rax = add 1, rax', this is now fixed using the commutativity information (we rewrite it in 'rax = add rax, 1').
2015-09-15cosmeticsQuentin Carbonneaux
2015-09-15compress parsref code a littleQuentin Carbonneaux
2015-09-15start improving constants supportQuentin Carbonneaux
2015-09-15add TODOQuentin Carbonneaux
2015-09-15add support for in-block reg. contraintsQuentin Carbonneaux
2015-09-15perform isel before code emissionQuentin Carbonneaux
2015-09-15emit some x86-sepcific instructionsQuentin Carbonneaux
2015-09-15compile emit moduleQuentin Carbonneaux
2015-09-15add a code emitter for at&t syntaxQuentin Carbonneaux
2015-09-15silence clang warningQuentin Carbonneaux
2015-09-15add crippled dce to the allocatorQuentin Carbonneaux
2015-09-15complete a crude register allocatorQuentin Carbonneaux
2015-09-15start work on parallel movesQuentin Carbonneaux
2015-09-15initiate work on reg allocationQuentin Carbonneaux
2015-09-15simplify spillerQuentin Carbonneaux
It seems that this logic of shuffling stuff around between blocks should be handled by the register allocator instead: it *will* have to shuffle between registers, so we might as well mix some spill locations in.
2015-09-15finish spiller, now needs testing!Quentin Carbonneaux
2015-09-15new euclidean division testQuentin Carbonneaux
2015-09-15add more printing supportQuentin Carbonneaux
2015-09-15standardize error messageQuentin Carbonneaux
2015-09-15factor some spilling logicQuentin Carbonneaux
2015-09-15comment and fix if(BSET(..)) bugQuentin Carbonneaux