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2022-05-11document spacing in il referenceQuentin Carbonneaux
2022-05-10add installation notesQuentin Carbonneaux
2022-05-10arm64: fix maximum immediate size for small loads/storesMichael Forney
The maximum immediate size for 1, 2, 4, and 8 byte loads/stores is 4095, 8190, 16380, and 32760 respectively[0][1][2]. [0] https://developer.arm.com/documentation/dui0802/a/A64-Data-Transfer-Instructions/LDRB--immediate- [1] https://developer.arm.com/documentation/dui0802/a/A64-Data-Transfer-Instructions/LDRH--immediate- [2] https://developer.arm.com/documentation/dui0802/a/A64-Data-Transfer-Instructions/LDR--immediate-
2022-04-11move nx stack annotation to gas.cQuentin Carbonneaux
2022-04-11Close input file after done readingDaniel Xu
Leaks resources to not close. Signed-off-by: Daniel Xu <dxu@dxuuu.xyz>
2022-04-11do not leak type fieldsQuentin Carbonneaux
Thanks to Daniel Xu for reporting.
2022-03-17amd64: restore previous name of amd64_sysv targetMichael Forney
2022-03-17fix return for big aggregatesQuentin Carbonneaux
The recent changes in arm and riscv typclass() set ngp to 1 when a struct is returned via a caller-provided buffer. This interacts bogusly with selret() that ends up declaring a gp register live when none is set in the returning sequence. The fix is simply to set cty to zero (all registers dead) in case a caller- provided buffer is used.
2022-03-15detect target in testsQuentin Carbonneaux
2022-03-15new -t? flag to print default targetQuentin Carbonneaux
2022-03-15homogenize riscv and arm abisQuentin Carbonneaux
2022-03-15support env calls on arm64Quentin Carbonneaux
The x9 register is used for the env parameter.
2022-03-15fix register count in riscv argregsQuentin Carbonneaux
2022-03-14dynamic stack allocs for arm64Quentin Carbonneaux
I also moved some isel logic that would have been repeated a third time in util.c.
2022-03-14add rv64/ to READMEQuentin Carbonneaux
2022-03-14output symbol type and sizeQuentin Carbonneaux
That is not available on osx so I tweaked the gas.c api a little to conditionally output the two directives.
2022-03-14improve consistency in abisQuentin Carbonneaux
2022-03-14arm64/abi: fix big aggregates passed on the stackQuentin Carbonneaux
The riscv test abi8.ssa caught a bug in the arm backend. It turns out we were using the wrong class when loading pointers to aggregates from the stack. The fix is simple and mirrors what is done in the riscv abi.
2022-03-11dust off antique .tagQuentin Carbonneaux
2022-03-10rv64: plug holes in the abiQuentin Carbonneaux
Many things got fixed, but the most notable change is the proper support of floating point types in aggregates. Minor fixes: - selpar() did not deal correctly with Cfpint - typclass() was reading out of bounds in the gp/fp arrays - support for env calls
2022-03-10two new tests in abi5.ssaQuentin Carbonneaux
They are meant to exercise the hardware floating-point calling convention of the risc-v target.
2022-03-10new abi stress testQuentin Carbonneaux
2022-03-08flag types defined as unionsQuentin Carbonneaux
The risc-v abi needs to know if a type is defined as a union or not. We cannot use nunion to obtain this information because the risc-v abi made the unfortunate decision of treating union { int i; } differently from int i; So, instead, I introduce a single bit flag 'isunion'.
2022-03-08cosmeticsQuentin Carbonneaux
2022-03-07doc: export function main in hello world examplelincoln auster [they/them]
This enables the example to be compiled and run as-is, without any additional modification.
2022-02-27rv64: formatting and bug fix in epilogueQuentin Carbonneaux
2022-02-27doc: Add missing neg entry to indexScott Graham
2022-02-27rv64: cosmetics in iselQuentin Carbonneaux
2022-02-25disable pie for rv64 testsQuentin Carbonneaux
2022-02-25improve consistency in arm64 and rv64 abisQuentin Carbonneaux
2022-02-24parse: allow string after first data itemPaul Ouellette
2022-02-24doc: minor fixesPaul Ouellette
2022-02-24fix folding of shifts of word operand by >32Paul Ouellette
2022-02-17add rv64 backendMichael Forney
It is mostly complete, but still has a few ABI bugs when passing floats in structs, or when structs are passed partly in register, and partly on stack.
2022-02-17test: add c[u]od checks to isel2 and add new integer compare test isel3Michael Forney
2022-02-17cfg: remove unnecessary check for jump typeMichael Forney
This condition should match any jump with two successors. This is needed on riscv64, where there is no flags register, so Jjnz is used all the way to emit().
2022-02-17Revert "skip jump arguments in rega"Michael Forney
This reverts commit 028534d9897079bf64559dca0402bc59a956ce46. riscv64 will have jump arguments with type RTmp.
2022-02-17spill: consider jump argument as use of registerMichael Forney
2022-02-11document the automatic use of bssQuentin Carbonneaux
2022-02-11gas: put zero data into .bss by defaultMichael Forney
This allows frontends to use BSS generically, without knowledge of platform-dependent details.
2022-02-11doc: fix name of export linkage flagPaul Ouellette
2022-02-02shared linkage logic for func/dataQuentin Carbonneaux
2022-01-31arm64: handle large slots in OcopyQuentin Carbonneaux
2022-01-31Do not use the asm keyword as a local variableDetlef Riekenberg
Signed-off-by: Detlef Riekenberg <wine.dev@web.de>
2022-01-28amd64/isel: nitsQuentin Carbonneaux
2022-01-28fix test/fpcnv (wrong spacing)Quentin Carbonneaux
2022-01-28update token hash paramsQuentin Carbonneaux
2022-01-28implement float -> unsigned castsBor Grošelj Simić
amd64 lacks instruction for this so it has to be implemented with float -> signed casts. The approach is borrowed from llvm.
2022-01-28implement unsigned -> float castsBor Grošelj Simić
amd64 lacks an instruction for this so it has to be implemented with signed -> float casts: - Word casting is done by zero-extending the word to a long and then doing a regular signed cast. - Long casting is done by dividing by two with correct rounding if the highest bit is set and casting that to float, then adding 1 to mantissa with integer addition
2022-01-23increase token limit to 255Bor Grošelj Simić
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