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2015-09-15add basic support for stack allocationQuentin Carbonneaux
2015-09-15minor size optimization for 0XSetQuentin Carbonneaux
2015-09-15add a small size optimization to emitQuentin Carbonneaux
2015-09-15split store into store{w,l}Quentin Carbonneaux
2015-09-15prefix register macrosQuentin Carbonneaux
2015-09-15fix my sloppy understanding of x86 assembly!Quentin Carbonneaux
2015-09-15cosmeticsQuentin Carbonneaux
2015-09-15movsb is not movsbl without suffix...Quentin Carbonneaux
2015-09-15attempt factoring store emission codeQuentin Carbonneaux
2015-09-15ugly support for store/loadQuentin Carbonneaux
2015-09-15simplify parsingQuentin Carbonneaux
2015-09-15add nmem to opdesc for use in the spillerQuentin Carbonneaux
This new machine-independent mechanism might not be general enough in the long term but, now, it provides a flexible way to inform the spiller about the maximum number of arguments of an instruction that can be spill locations.
2015-09-15add some load/store operationsQuentin Carbonneaux
2015-09-15fix wrong instruction in emitQuentin Carbonneaux
2015-09-15jez becomes jnz, complete cmp+jmp contractionQuentin Carbonneaux
2015-09-15split cmp in two sizesQuentin Carbonneaux
2015-09-15fix two bugs in iselQuentin Carbonneaux
2015-09-15fix 2 bad bugs in rega and improve substractionQuentin Carbonneaux
The substraction contrained the register allocator to allocate a different register for the result and the second operand, now, we use a neg trick to compile it down. The machinery that was setup is, regardless, interesting and will have to be used for floating point computations (division). The first bug in rega made broke the explicited loop invariant: we were using register allocation unavailable information from other blocks. It's still unclear how we got wrong results from that considering mappings are all 0-initialized. The second bug is a stupid one, one sizeof operator was missing from a memcpy...
2015-09-15quick fix for comparisons with constantsQuentin Carbonneaux
2015-09-15start work on comparisonsQuentin Carbonneaux
There are two things I overlooked so far. 1. Binary instructions like cmp that do not have a result in registers need the size suffix sometimes, for example when comparing a spill location with a constant. 2. The register allocator needs to be adapted to support the comparison instruction: it is not possible to compare two spill locations without using a register.
2015-09-15use cmp $0, it works with spill slotsQuentin Carbonneaux
2015-09-15adapt emit to new Ref settingQuentin Carbonneaux
2015-09-15start work on word/long handlingQuentin Carbonneaux
2015-09-15replace IA with X for x64 instructionsQuentin Carbonneaux
2015-09-15avoid keyword clash by using cons for constantsQuentin Carbonneaux
2015-09-15clean the commutativity + fix bug in emitQuentin Carbonneaux
The commutativity information only makes sense for arithmetic expressions. To account for that, I introduced a new tri-valued boolean type B3. Memory operations, for example, will receive an undefined commutativity trit. The code emitter was buggy when rega emitted instructions like 'rax = add 1, rax', this is now fixed using the commutativity information (we rewrite it in 'rax = add rax, 1').
2015-09-15start improving constants supportQuentin Carbonneaux
2015-09-15emit some x86-sepcific instructionsQuentin Carbonneaux
2015-09-15add a code emitter for at&t syntaxQuentin Carbonneaux