Age | Commit message (Collapse) | Author | |
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2015-09-15 | major lifting: get rid of RReg | Quentin Carbonneaux | |
I've been septic since I introduced it, this commit proves that it costs more than it helps. I've also fixed a bad bug in rega() where I alloc'ed the wrong size for internal arrays. Enums now have names so I can use them to cast in gdb to get the name corresponding to a constant. | |||
2015-09-15 | add basic support for stack allocation | Quentin Carbonneaux | |
2015-09-15 | split store into store{w,l} | Quentin Carbonneaux | |
2015-09-15 | prefix register macros | Quentin Carbonneaux | |
2015-09-15 | cosmetics | Quentin Carbonneaux | |
2015-09-15 | simplify parsing | Quentin Carbonneaux | |
2015-09-15 | add nmem to opdesc for use in the spiller | Quentin Carbonneaux | |
This new machine-independent mechanism might not be general enough in the long term but, now, it provides a flexible way to inform the spiller about the maximum number of arguments of an instruction that can be spill locations. | |||
2015-09-15 | add some load/store operations | Quentin Carbonneaux | |
2015-09-15 | jez becomes jnz, complete cmp+jmp contraction | Quentin Carbonneaux | |
2015-09-15 | implement smarter compare+branch | Quentin Carbonneaux | |
2015-09-15 | split cmp in two sizes | Quentin Carbonneaux | |
2015-09-15 | fix two bugs in isel | Quentin Carbonneaux | |
2015-09-15 | quick fix for comparisons with constants | Quentin Carbonneaux | |
2015-09-15 | start work on comparisons | Quentin Carbonneaux | |
There are two things I overlooked so far. 1. Binary instructions like cmp that do not have a result in registers need the size suffix sometimes, for example when comparing a spill location with a constant. 2. The register allocator needs to be adapted to support the comparison instruction: it is not possible to compare two spill locations without using a register. | |||
2015-09-15 | use correct sizes during reg allocation | Quentin Carbonneaux | |
2015-09-15 | use a new Ref type for registers | Quentin Carbonneaux | |
This might not be a good idea, the problem was that many spurious registers would be added to the Bits data-structures during compilation (and would always remain 0). However, doing the above modification de-uniformizes the handling of temps and regs, this makes the code longer and not really nicer. Also, additional Bits structures are required to track the registers independently. Overall this might be a bad idea to revert. | |||
2015-09-15 | avoid name conflicts in enums | Quentin Carbonneaux | |
2015-09-15 | start change of representation for registers | Quentin Carbonneaux | |
2015-09-15 | start work on word/long handling | Quentin Carbonneaux | |
2015-09-15 | replace IA with X for x64 instructions | Quentin Carbonneaux | |
2015-09-15 | avoid keyword clash by using cons for constants | Quentin Carbonneaux | |
2015-09-15 | clean the commutativity + fix bug in emit | Quentin Carbonneaux | |
The commutativity information only makes sense for arithmetic expressions. To account for that, I introduced a new tri-valued boolean type B3. Memory operations, for example, will receive an undefined commutativity trit. The code emitter was buggy when rega emitted instructions like 'rax = add 1, rax', this is now fixed using the commutativity information (we rewrite it in 'rax = add rax, 1'). | |||
2015-09-15 | start improving constants support | Quentin Carbonneaux | |
2015-09-15 | add a code emitter for at&t syntax | Quentin Carbonneaux | |
2015-09-15 | add crippled dce to the allocator | Quentin Carbonneaux | |
2015-09-15 | complete a crude register allocator | Quentin Carbonneaux | |
2015-09-15 | initiate work on reg allocation | Quentin Carbonneaux | |
2015-09-15 | finish spiller, now needs testing! | Quentin Carbonneaux | |
2015-09-15 | add more printing support | Quentin Carbonneaux | |
2015-09-15 | add slot addressing and some more spilling | Quentin Carbonneaux | |
2015-09-15 | prepare for block processing | Quentin Carbonneaux | |
2015-09-15 | rework spilling code for jump arguments | Quentin Carbonneaux | |
2015-09-15 | improve output, add debug array | Quentin Carbonneaux | |
2015-09-15 | attempt more correct loop marking | Quentin Carbonneaux | |
2015-09-15 | rework liveness to compute reg pressure | Quentin Carbonneaux | |
2015-09-15 | start work on spiller | Quentin Carbonneaux | |
2015-09-15 | single bit bitfield needs to be unsigned | Quentin Carbonneaux | |
2015-09-15 | fix small type issues | Quentin Carbonneaux | |
2015-09-15 | export error functions | Quentin Carbonneaux | |
2015-09-15 | rename mod to rem | Quentin Carbonneaux | |
2015-09-15 | remove useless typedefs | Quentin Carbonneaux | |
2015-09-15 | cosmetics | Quentin Carbonneaux | |
2015-09-15 | add rpo test and some liveness code | Quentin Carbonneaux | |
2015-09-15 | cosmetics | Quentin Carbonneaux | |
2015-09-15 | use argument array for all instructions | Quentin Carbonneaux | |
2015-09-15 | change Ref to a struct | Quentin Carbonneaux | |
2015-09-15 | move opdesc definition | Quentin Carbonneaux | |
2015-09-15 | add pretty printing function | Quentin Carbonneaux | |
2015-09-15 | change phi nodes representation | Quentin Carbonneaux | |
2015-09-15 | give blocks an id | Quentin Carbonneaux | |