~cnx/roux - Alternative QBE compiler

Age	Commit message (Collapse)	Author
2016-03-25	great renaming campain!	Quentin Carbonneaux

2016-03-22	store register usage of ret instructions (abi fuzz)	Quentin Carbonneaux
	So far I was ignoring register uses of return instructions and it was working because at most one register could be returned. Now that more complex returns are supported it is necessary to keep track of the registers used by returns. The abi fuzzer triggered an assertion failure in the register allocator with the following IL: R1 =l load [%t16] R3 =l load [8 + %t16] ret The regalloc would use R1 for %t16, and then a (nice) assertion realized the inconsistent state because R1 could only be def'd by an assignment to %t16.
2016-03-18	remove spurious assignments in rega	Quentin Carbonneaux

2016-03-04	get rid of hard coded NBlk	Quentin Carbonneaux

2016-02-27	leave only the most important free todos	Quentin Carbonneaux

2016-02-27	use a new bits type for bitmaps	Quentin Carbonneaux

2016-02-26	use bitset in rega.c (broken)	Quentin Carbonneaux

2016-02-15	initialize class correctly in pmgen()	Quentin Carbonneaux

2016-02-04	fix super old bug in rega!	Quentin Carbonneaux

2016-01-29	more fp integration in rega	Quentin Carbonneaux

2016-01-28	start fp integration in rega	Quentin Carbonneaux

2015-11-20	avoid having conflicting hints in rega	Quentin Carbonneaux

2015-11-20	wip on rega bug (sequel of last commit)	Quentin Carbonneaux

2015-11-09	provide BZERO macro for bitsets	Quentin Carbonneaux

2015-11-03	add interference hints	Quentin Carbonneaux

2015-10-31	make phi-class handling more local	Quentin Carbonneaux
	The phi classes are no longer in a union-find structure, instead each temporary argument of a phi node gets a pointer to it. The hinting of the phi node is then shared with its the one of its arguments. When liveness proceeds and finds out that two elements with same hinting (a phi node and one of its arguments or two arguments of the same phi node) interfere, one of them has its phi pointer reset, that way, the hinting won't be shared.
2015-10-30	new regalloc heuristic for phis	Quentin Carbonneaux
	At the beginning of each block look at the phi nodes that have some arguments already allocated. If the some arguments from blocks with high execution frequency are all assigned 'r', reset the the hint for the phi node to this 'r'. Combined with the following heuristic, this can save some copies at the end of the destination blocks.
2015-10-30	wip on regalloc new heuristics	Quentin Carbonneaux
	I thought that many parallel copies generated can be avoided if temporaries are in their hint register at the beginning of blocks with multiple predecessors. To get more benefit, I suspect that we could use a copy-propagating peephole pass.
2015-10-30	setup hints for function arguments	Quentin Carbonneaux

2015-10-30	prioritize reg. allocation of some temporaries	Quentin Carbonneaux

2015-10-30	port rega.c to work with RAMem	Quentin Carbonneaux

2015-10-30	start integrating RAMem references	Quentin Carbonneaux

2015-10-30	rename spill field in Tmp to slot	Quentin Carbonneaux

2015-10-30	emit code for extensions, move slots into RAlt	Quentin Carbonneaux

2015-10-13	rename valloc and balloc	Quentin Carbonneaux
	valloc is actually a POSIX function that prevents compilation on some systems.
2015-10-08	fix minor bug in rega	Quentin Carbonneaux
	The detection of empty permutations was incorrect since the changes made to the vector routines.
2015-10-06	add pool memory management	Quentin Carbonneaux

2015-10-06	specialize vdup into idup	Quentin Carbonneaux

2015-10-06	factor ins array edition in icpy	Quentin Carbonneaux

2015-10-05	factor vector duplication in vdup()	Quentin Carbonneaux

2015-10-05	rename blocka to balloc	Quentin Carbonneaux

2015-10-05	factor some utility functions/data in util.c	Quentin Carbonneaux

2015-10-05	clean the command line interface	Quentin Carbonneaux

2015-09-29	wip on new stack slots (emit, spill)	Quentin Carbonneaux

2015-09-28	stupid hinting works better without traces!	Quentin Carbonneaux

2015-09-25	fresh new trace based allocator (needs tuning)	Quentin Carbonneaux

2015-09-25	prepare rega for trace-based allocation	Quentin Carbonneaux

2015-09-22	do not do dce on register assignments	Quentin Carbonneaux

2015-09-21	fix rega bug for indirect calls	Quentin Carbonneaux

2015-09-20	save callee-save registers	Quentin Carbonneaux

2015-09-15	fix call bug in rega	Quentin Carbonneaux
	When rdx is used to return a value and is used as argument, it is in the call defs and hence made dead by the loop modified here. This is obviously erroneous behavior. We instead rephrase the loop to make it clear that among the caller-save registers, only the ones used by the call must be live before the call.
2015-09-15	heavy modification of call handling	Quentin Carbonneaux
	The IR generated by calls was very bulky because two instructions were used for marking the live range of a clobber. This patch attempts to store the information of what registers are use/def/clobber in the call instruction itself, this leads to more compact code (even more when we'll have SSE registers). However, I find that the amount of extra code needed is not really easonable. Fortunately it is not too invasive, thus if the complexity creeps in, it should be easy to revert.
2015-09-15	more modifications to rega	Quentin Carbonneaux

2015-09-15	add a size to all operations (wip)	Quentin Carbonneaux

2015-09-15	my assumptions in dopm() were wrong	Quentin Carbonneaux
	revert commit d0e9e3ada106dfe8dcda7a0099b341000f00afb2.
2015-09-15	simplify rega's dopm()	Quentin Carbonneaux

2015-09-15	update dopm()	Quentin Carbonneaux
	I could never figure out a correct version without the tests. I'm now fairly confident dopm() will work as we need it to.
2015-09-15	add helpful diagnostics	Quentin Carbonneaux

2015-09-15	add test scaffolding code	Quentin Carbonneaux

2015-09-15	work in progress on parallel moves	Quentin Carbonneaux
	The old code was broken for sure, this one might be. I have to create a test bench for the dopm function. It would also test the parallel move lowering (pmgen and folks).