summary refs log tree commit diff
path: root/lisc/rega.c
AgeCommit message (Collapse)Author
2015-11-20avoid having conflicting hints in regaQuentin Carbonneaux
2015-11-20wip on rega bug (sequel of last commit)Quentin Carbonneaux
2015-11-09provide BZERO macro for bitsetsQuentin Carbonneaux
2015-11-03add interference hintsQuentin Carbonneaux
2015-10-31make phi-class handling more localQuentin Carbonneaux
The phi classes are no longer in a union-find structure, instead each temporary argument of a phi node gets a pointer to it. The hinting of the phi node is then shared with its the one of its arguments. When liveness proceeds and finds out that two elements with same hinting (a phi node and one of its arguments or two arguments of the same phi node) interfere, one of them has its phi pointer reset, that way, the hinting won't be shared.
2015-10-30new regalloc heuristic for phisQuentin Carbonneaux
At the beginning of each block look at the phi nodes that have some arguments already allocated. If the some arguments from blocks with high execution frequency are all assigned 'r', reset the the hint for the phi node to this 'r'. Combined with the following heuristic, this can save some copies at the end of the destination blocks.
2015-10-30wip on regalloc new heuristicsQuentin Carbonneaux
I thought that many parallel copies generated can be avoided if temporaries are in their hint register at the beginning of blocks with multiple predecessors. To get more benefit, I suspect that we could use a copy-propagating peephole pass.
2015-10-30setup hints for function argumentsQuentin Carbonneaux
2015-10-30prioritize reg. allocation of some temporariesQuentin Carbonneaux
2015-10-30port rega.c to work with RAMemQuentin Carbonneaux
2015-10-30start integrating RAMem referencesQuentin Carbonneaux
2015-10-30rename spill field in Tmp to slotQuentin Carbonneaux
2015-10-30emit code for extensions, move slots into RAltQuentin Carbonneaux
2015-10-13rename valloc and ballocQuentin Carbonneaux
valloc is actually a POSIX function that prevents compilation on some systems.
2015-10-08fix minor bug in regaQuentin Carbonneaux
The detection of empty permutations was incorrect since the changes made to the vector routines.
2015-10-06add pool memory managementQuentin Carbonneaux
2015-10-06specialize vdup into idupQuentin Carbonneaux
2015-10-06factor ins array edition in icpyQuentin Carbonneaux
2015-10-05factor vector duplication in vdup()Quentin Carbonneaux
2015-10-05rename blocka to ballocQuentin Carbonneaux
2015-10-05factor some utility functions/data in util.cQuentin Carbonneaux
2015-10-05clean the command line interfaceQuentin Carbonneaux
2015-09-29wip on new stack slots (emit, spill)Quentin Carbonneaux
2015-09-28stupid hinting works better without traces!Quentin Carbonneaux
2015-09-25fresh new trace based allocator (needs tuning)Quentin Carbonneaux
2015-09-25prepare rega for trace-based allocationQuentin Carbonneaux
2015-09-22do not do dce on register assignmentsQuentin Carbonneaux
2015-09-21fix rega bug for indirect callsQuentin Carbonneaux
2015-09-20save callee-save registersQuentin Carbonneaux
2015-09-15fix call bug in regaQuentin Carbonneaux
When rdx is used to return a value and is used as argument, it is in the call defs and hence made dead by the loop modified here. This is obviously erroneous behavior. We instead rephrase the loop to make it clear that among the caller-save registers, only the ones used by the call must be live before the call.
2015-09-15heavy modification of call handlingQuentin Carbonneaux
The IR generated by calls was very bulky because two instructions were used for marking the live range of a clobber. This patch attempts to store the information of what registers are use/def/clobber in the call instruction itself, this leads to more compact code (even more when we'll have SSE registers). However, I find that the amount of extra code needed is not really easonable. Fortunately it is not too invasive, thus if the complexity creeps in, it should be easy to revert.
2015-09-15more modifications to regaQuentin Carbonneaux
2015-09-15add a size to all operations (wip)Quentin Carbonneaux
2015-09-15my assumptions in dopm() were wrongQuentin Carbonneaux
revert commit d0e9e3ada106dfe8dcda7a0099b341000f00afb2.
2015-09-15simplify rega's dopm()Quentin Carbonneaux
2015-09-15update dopm()Quentin Carbonneaux
I could never figure out a correct version without the tests. I'm now fairly confident dopm() will work as we need it to.
2015-09-15add helpful diagnosticsQuentin Carbonneaux
2015-09-15add test scaffolding codeQuentin Carbonneaux
2015-09-15work in progress on parallel movesQuentin Carbonneaux
The old code was broken for sure, this one might be. I have to create a test bench for the dopm function. It would also test the parallel move lowering (pmgen and folks).
2015-09-15fix two bugs in regaQuentin Carbonneaux
The first one was not so bad, when we a parallel move clobbers one machine register in use, we used to free the temporary t* using it, mark the register as unavailable and allocate a new location for the t*. But this fails when all the registers are in use. In that case, the destination of the move must be in a register r1, so I require a swap of the register to copy (used by t*) with r1 and update the map accordingly. I would like to move all the above logic in a function dealing with clobbers in general. The second bug is in the parallel move compiler, this one was a little more nasty and could have caused much debugging pain. It would be reasonable to test it in a similar way that I did for the slota() allocator.
2015-09-15remove dead code from regaQuentin Carbonneaux
An invariant is that all registers allocated at some point have a hint. This makes the code removed by this commit dead because of the if condition testing for empty hints.
2015-09-15treat two instruction args uniformly in regaQuentin Carbonneaux
2015-09-15tweak block-border heuristic for reg. allocationQuentin Carbonneaux
We only allocate a register that has a hint if the hint register is not used already. In the max example it gives a better result and it does not seem to affect the collatz test.
2015-09-15refine the clobber codeQuentin Carbonneaux
It could very well be that the temporary we assign already got assigned to the right register! Good things happen.
2015-09-15fix two heuristics in regaQuentin Carbonneaux
There was a typo that made always the same successor to be selected for register allocation hinting. Also, I now attempt to prioritize hints over succeccor's choices as it appears to give slightly better results... Now that I think about it, the code re-using the most frequent successor block's assignment might be dead because all registers have hints if they got assigned once. To investigate.
2015-09-15remove round-robin in ralloc (need preferences)Quentin Carbonneaux
2015-09-15clobber check code was wrong in dopm()Quentin Carbonneaux
2015-09-15fix bug in parallel moves codeQuentin Carbonneaux
2015-09-15avoid depending on uninitialized rQuentin Carbonneaux
2015-09-15use the same bitset for regs and tmps in rega()Quentin Carbonneaux
This is possible because we know that they are represented by different integers.