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1. In limit(), there can be machine registers that are
live, thus we need to iterate from 0 (not Tmp0) to
ntmp in the for loop building the array.
2. When an instruction can have a memory argument, we
must not reload arguments that got spilled and were
not live. Instead, the must be replaced by SLOT()
arguments.
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The IR generated by calls was very bulky because two
instructions were used for marking the live range of
a clobber.
This patch attempts to store the information of what
registers are use/def/clobber in the call instruction
itself, this leads to more compact code (even more
when we'll have SSE registers). However, I find that
the amount of extra code needed is not really
easonable. Fortunately it is not too invasive, thus
if the complexity creeps in, it should be easy to
revert.
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In emit, I worked a little to make sure that framesz works
when we change the size of the svec array (if we need more
alignments).
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When we are dealing with a block that is not
a loop, we must make sure to consider phi arguments
of successors as live variables. Ideally we could
move the code to find all live-ins (including phi
arguments) to the live module.
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It seems that the MEM reference type is
meaningless in too many positions.
Because of this, it is unclear if we
should keep it or just introduce a
OAddr instruction that only accepts
slots.
Regardless of the above, the spilling
module needs to use the new slot_()
function, also, the emit function needs
to fetch the size of the stack frame
from the slot[] array.
The naming is still very transitional,
here is a list of all bogus names I can
think of:
- SLOT()
- Tmp.spill
- slot_
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I've been septic since I introduced it, this commit
proves that it costs more than it helps. I've also fixed
a bad bug in rega() where I alloc'ed the wrong size for
internal arrays. Enums now have names so I can use them
to cast in gdb to get the name corresponding to a constant.
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This new machine-independent mechanism might not be general
enough in the long term but, now, it provides a flexible way
to inform the spiller about the maximum number of arguments
of an instruction that can be spill locations.
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The way we detected if limit had spilled a variable
was incorrect. This is because two consecutive calls
to limit could require a spill of the same variable.
Instead, we now use a return value from limit.
Note that this is still not so ideal. Indeed, it works
properly only when limit spills one value only, if not,
we should return a bitset. In the current use scheme
of limit, this invariant is true but ideally we would
like to call limit with *all arguments added at once*,
not one after the other.
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The substraction contrained the register allocator
to allocate a different register for the result and
the second operand, now, we use a neg trick to compile
it down. The machinery that was setup is, regardless,
interesting and will have to be used for floating
point computations (division).
The first bug in rega made broke the explicited loop
invariant: we were using register allocation unavailable
information from other blocks. It's still unclear
how we got wrong results from that considering mappings
are all 0-initialized.
The second bug is a stupid one, one sizeof operator was
missing from a memcpy...
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I think this was not a big issue because the register
allocator does not consume a register when it encounters
obviously dead code.
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There are two things I overlooked so far.
1. Binary instructions like cmp that do not have a result
in registers need the size suffix sometimes, for example
when comparing a spill location with a constant.
2. The register allocator needs to be adapted to support the
comparison instruction: it is not possible to compare two
spill locations without using a register.
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This might not be a good idea, the problem was that
many spurious registers would be added to the Bits
data-structures during compilation (and would
always remain 0). However, doing the above
modification de-uniformizes the handling of temps
and regs, this makes the code longer and not
really nicer. Also, additional Bits structures
are required to track the registers independently.
Overall this might be a bad idea to revert.
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The commutativity information only makes sense for
arithmetic expressions. To account for that, I introduced
a new tri-valued boolean type B3. Memory operations, for
example, will receive an undefined commutativity trit.
The code emitter was buggy when rega emitted instructions
like 'rax = add 1, rax', this is now fixed using the
commutativity information (we rewrite it in 'rax = add
rax, 1').
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It seems that this logic of shuffling stuff around
between blocks should be handled by the register
allocator instead: it *will* have to shuffle
between registers, so we might as well mix some
spill locations in.
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