From 9456200d91840b09cb876146c271c5cbe503d767 Mon Sep 17 00:00:00 2001 From: Quentin Carbonneaux Date: Mon, 3 Aug 2015 13:17:44 -0400 Subject: use a new Ref type for registers This might not be a good idea, the problem was that many spurious registers would be added to the Bits data-structures during compilation (and would always remain 0). However, doing the above modification de-uniformizes the handling of temps and regs, this makes the code longer and not really nicer. Also, additional Bits structures are required to track the registers independently. Overall this might be a bad idea to revert. --- lisc/live.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) (limited to 'lisc/live.c') diff --git a/lisc/live.c b/lisc/live.c index d1c31a2..aec7701 100644 --- a/lisc/live.c +++ b/lisc/live.c @@ -6,7 +6,7 @@ bset(Ref r, Blk *b, Bits *rb, int *nlv) Bits *bs; switch (rtype(r)) { - case RSym: + case RTmp: bs = &b->in; BSET(b->gen, r.val); break; @@ -14,7 +14,6 @@ bset(Ref r, Blk *b, Bits *rb, int *nlv) bs = rb; break; default: - diag("live: unhandled reference"); return; } if (!BGET(*bs, r.val)) { @@ -36,7 +35,7 @@ filllive(Fn *f) uint a; Bits tb, rb; - assert(f->nsym <= NBit*BITS); + assert(f->ntmp <= NBit*BITS); for (b=f->start; b; b=b->link) { b->in = (Bits){{0}}; b->out = (Bits){{0}}; @@ -64,15 +63,18 @@ Again: for (i=&b->ins[b->nins]; i!=b->ins;) { i--; switch (rtype(i->to)) { - case RSym: + default: + diag("live: unhandled destination"); + case RTmp: nlv -= BGET(b->in, i->to.val); BCLR(b->in, i->to.val); break; case RReg: nlv -= BGET(rb, i->to.val); BCLR(rb, i->to.val); - default: - diag("live: unhandled destination"); + break; + case -1: + break; } bset(i->arg[0], b, &rb, &nlv); bset(i->arg[1], b, &rb, &nlv); @@ -83,7 +85,7 @@ Again: for (p=b->phi; p; p=p->link) { BCLR(b->in, p->to.val); for (a=0; anarg; a++) - if (rtype(p->arg[a]) == RSym) + if (rtype(p->arg[a]) == RTmp) BSET(p->blk[a]->out, p->arg[a].val); } } -- cgit 1.4.1