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authorvanhauser-thc <vh@thc.org>2022-01-13 10:09:35 +0100
committervanhauser-thc <vh@thc.org>2022-01-13 10:09:35 +0100
commit110cc27632c8f2018b79f95cbff9c9daa3f509f7 (patch)
treeb613a34e70146387532ca2d4d4acedddf8589899
parent21ebfec79c75f99c938ebfc453e76eb82328d12e (diff)
downloadafl++-110cc27632c8f2018b79f95cbff9c9daa3f509f7.tar.gz
fix laf-intel split switches
-rw-r--r--instrumentation/split-switches-pass.so.cc6
1 files changed, 2 insertions, 4 deletions
diff --git a/instrumentation/split-switches-pass.so.cc b/instrumentation/split-switches-pass.so.cc
index 85a35c2a..9f9e7eca 100644
--- a/instrumentation/split-switches-pass.so.cc
+++ b/instrumentation/split-switches-pass.so.cc
@@ -118,8 +118,6 @@ BasicBlock *SplitSwitchesTransform::switchConvert(
   std::vector<uint8_t> setSizes;
   std::vector<std::set<uint8_t> > byteSets(BytesInValue, std::set<uint8_t>());
 
-  assert(ValTypeBitWidth >= 8 && ValTypeBitWidth <= 64);
-
   /* for each of the possible cases we iterate over all bytes of the values
    * build a set of possible values at each byte position in byteSets */
   for (CaseExpr &Case : Cases) {
@@ -350,9 +348,9 @@ bool SplitSwitchesTransform::splitSwitches(Module &M) {
 
     /* If there is only the default destination or the condition checks 8 bit or
      * less, don't bother with the code below. */
-    if (!SI->getNumCases() || bitw <= 8) {
+    if (SI->getNumCases() < 2 || bitw % 8 || bitw > 64) {
 
-      // if (!be_quiet) errs() << "skip trivial switch..\n";
+      // if (!be_quiet) errs() << "skip switch..\n";
       continue;
 
     }