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authorhexcoder <hexcoder-@users.noreply.github.com>2021-05-31 19:18:24 +0200
committerGitHub <noreply@github.com>2021-05-31 19:18:24 +0200
commit97a1f89881878db9bd6b4cd666b3447a63818dcf (patch)
tree46e844356f7cf88c08f9f9907caa11656a24f416 /frida_mode/src/ctx
parentb246de789105750558f3d6f884ba61e54cb98441 (diff)
parent1a2da67ed0505c9ac0aa1048ba3d607f3c1aa639 (diff)
downloadafl++-97a1f89881878db9bd6b4cd666b3447a63818dcf.tar.gz
Merge branch 'dev' into going_atomic
Diffstat (limited to 'frida_mode/src/ctx')
-rw-r--r--frida_mode/src/ctx/ctx_x64.c114
-rw-r--r--frida_mode/src/ctx/ctx_x86.c81
2 files changed, 195 insertions, 0 deletions
diff --git a/frida_mode/src/ctx/ctx_x64.c b/frida_mode/src/ctx/ctx_x64.c
new file mode 100644
index 00000000..c5900533
--- /dev/null
+++ b/frida_mode/src/ctx/ctx_x64.c
@@ -0,0 +1,114 @@
+#include "frida-gum.h"
+
+#include "debug.h"
+
+#include "ctx.h"
+
+#if defined(__x86_64__)
+
+ #define X86_REG_8L(LABEL, REG) \
+ case LABEL: { \
+ \
+ return REG & GUM_INT8_MASK; \
+ \
+ }
+
+ #define X86_REG_8H(LABEL, REG) \
+ case LABEL: { \
+ \
+ return (REG & GUM_INT16_MASK) >> 8; \
+ \
+ }
+
+ #define X86_REG_16(LABEL, REG) \
+ case LABEL: { \
+ \
+ return (REG & GUM_INT16_MASK); \
+ \
+ }
+
+ #define X86_REG_32(LABEL, REG) \
+ case LABEL: { \
+ \
+ return (REG & GUM_INT32_MASK); \
+ \
+ }
+
+ #define X86_REG_64(LABEL, REG) \
+ case LABEL: { \
+ \
+ return (REG); \
+ \
+ }
+
+gsize ctx_read_reg(GumX64CpuContext *ctx, x86_reg reg) {
+
+ switch (reg) {
+
+ X86_REG_8L(X86_REG_AL, ctx->rax)
+ X86_REG_8L(X86_REG_BL, ctx->rbx)
+ X86_REG_8L(X86_REG_CL, ctx->rcx)
+ X86_REG_8L(X86_REG_DL, ctx->rdx)
+ X86_REG_8L(X86_REG_BPL, ctx->rbp)
+ X86_REG_8L(X86_REG_SIL, ctx->rsi)
+ X86_REG_8L(X86_REG_DIL, ctx->rdi)
+
+ X86_REG_8H(X86_REG_AH, ctx->rax)
+ X86_REG_8H(X86_REG_BH, ctx->rbx)
+ X86_REG_8H(X86_REG_CH, ctx->rcx)
+ X86_REG_8H(X86_REG_DH, ctx->rdx)
+
+ X86_REG_16(X86_REG_AX, ctx->rax)
+ X86_REG_16(X86_REG_BX, ctx->rbx)
+ X86_REG_16(X86_REG_CX, ctx->rcx)
+ X86_REG_16(X86_REG_DX, ctx->rdx)
+ X86_REG_16(X86_REG_DI, ctx->rdi)
+ X86_REG_16(X86_REG_SI, ctx->rsi)
+ X86_REG_16(X86_REG_BP, ctx->rbp)
+
+ X86_REG_32(X86_REG_EAX, ctx->rax)
+ X86_REG_32(X86_REG_ECX, ctx->rcx)
+ X86_REG_32(X86_REG_EDX, ctx->rdx)
+ X86_REG_32(X86_REG_EBX, ctx->rbx)
+ X86_REG_32(X86_REG_ESP, ctx->rsp)
+ X86_REG_32(X86_REG_EBP, ctx->rbp)
+ X86_REG_32(X86_REG_ESI, ctx->rsi)
+ X86_REG_32(X86_REG_EDI, ctx->rdi)
+ X86_REG_32(X86_REG_R8D, ctx->r8)
+ X86_REG_32(X86_REG_R9D, ctx->r9)
+ X86_REG_32(X86_REG_R10D, ctx->r10)
+ X86_REG_32(X86_REG_R11D, ctx->r11)
+ X86_REG_32(X86_REG_R12D, ctx->r12)
+ X86_REG_32(X86_REG_R13D, ctx->r13)
+ X86_REG_32(X86_REG_R14D, ctx->r14)
+ X86_REG_32(X86_REG_R15D, ctx->r15)
+ X86_REG_32(X86_REG_EIP, ctx->rip)
+
+ X86_REG_64(X86_REG_RAX, ctx->rax)
+ X86_REG_64(X86_REG_RCX, ctx->rcx)
+ X86_REG_64(X86_REG_RDX, ctx->rdx)
+ X86_REG_64(X86_REG_RBX, ctx->rbx)
+ X86_REG_64(X86_REG_RSP, ctx->rsp)
+ X86_REG_64(X86_REG_RBP, ctx->rbp)
+ X86_REG_64(X86_REG_RSI, ctx->rsi)
+ X86_REG_64(X86_REG_RDI, ctx->rdi)
+ X86_REG_64(X86_REG_R8, ctx->r8)
+ X86_REG_64(X86_REG_R9, ctx->r9)
+ X86_REG_64(X86_REG_R10, ctx->r10)
+ X86_REG_64(X86_REG_R11, ctx->r11)
+ X86_REG_64(X86_REG_R12, ctx->r12)
+ X86_REG_64(X86_REG_R13, ctx->r13)
+ X86_REG_64(X86_REG_R14, ctx->r14)
+ X86_REG_64(X86_REG_R15, ctx->r15)
+ X86_REG_64(X86_REG_RIP, ctx->rip)
+
+ default:
+ FATAL("Failed to read register: %d", reg);
+ return 0;
+
+ }
+
+}
+
+#endif
+
diff --git a/frida_mode/src/ctx/ctx_x86.c b/frida_mode/src/ctx/ctx_x86.c
new file mode 100644
index 00000000..45308272
--- /dev/null
+++ b/frida_mode/src/ctx/ctx_x86.c
@@ -0,0 +1,81 @@
+#include "frida-gum.h"
+
+#include "debug.h"
+
+#include "ctx.h"
+
+#if defined(__i386__)
+
+ #define X86_REG_8L(LABEL, REG) \
+ case LABEL: { \
+ \
+ return REG & GUM_INT8_MASK; \
+ \
+ }
+
+ #define X86_REG_8H(LABEL, REG) \
+ case LABEL: { \
+ \
+ return (REG & GUM_INT16_MASK) >> 8; \
+ \
+ }
+
+ #define X86_REG_16(LABEL, REG) \
+ case LABEL: { \
+ \
+ return (REG & GUM_INT16_MASK); \
+ \
+ }
+
+ #define X86_REG_32(LABEL, REG) \
+ case LABEL: { \
+ \
+ return (REG & GUM_INT32_MASK); \
+ \
+ }
+
+gsize ctx_read_reg(GumIA32CpuContext *ctx, x86_reg reg) {
+
+ switch (reg) {
+
+ X86_REG_8L(X86_REG_AL, ctx->eax)
+ X86_REG_8L(X86_REG_BL, ctx->ebx)
+ X86_REG_8L(X86_REG_CL, ctx->ecx)
+ X86_REG_8L(X86_REG_DL, ctx->edx)
+ X86_REG_8L(X86_REG_BPL, ctx->ebp)
+ X86_REG_8L(X86_REG_SIL, ctx->esi)
+ X86_REG_8L(X86_REG_DIL, ctx->edi)
+
+ X86_REG_8H(X86_REG_AH, ctx->eax)
+ X86_REG_8H(X86_REG_BH, ctx->ebx)
+ X86_REG_8H(X86_REG_CH, ctx->ecx)
+ X86_REG_8H(X86_REG_DH, ctx->edx)
+
+ X86_REG_16(X86_REG_AX, ctx->eax)
+ X86_REG_16(X86_REG_BX, ctx->ebx)
+ X86_REG_16(X86_REG_CX, ctx->ecx)
+ X86_REG_16(X86_REG_DX, ctx->edx)
+ X86_REG_16(X86_REG_DI, ctx->edi)
+ X86_REG_16(X86_REG_SI, ctx->esi)
+ X86_REG_16(X86_REG_BP, ctx->ebp)
+
+ X86_REG_32(X86_REG_EAX, ctx->eax)
+ X86_REG_32(X86_REG_ECX, ctx->ecx)
+ X86_REG_32(X86_REG_EDX, ctx->edx)
+ X86_REG_32(X86_REG_EBX, ctx->ebx)
+ X86_REG_32(X86_REG_ESP, ctx->esp)
+ X86_REG_32(X86_REG_EBP, ctx->ebp)
+ X86_REG_32(X86_REG_ESI, ctx->esi)
+ X86_REG_32(X86_REG_EDI, ctx->edi)
+ X86_REG_32(X86_REG_EIP, ctx->eip)
+
+ default:
+ FATAL("Failed to read register: %d", reg);
+ return 0;
+
+ }
+
+}
+
+#endif
+