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authorAndrea Fioraldi <andreafioraldi@gmail.com>2019-12-15 14:17:54 +0100
committerAndrea Fioraldi <andreafioraldi@gmail.com>2019-12-15 14:17:54 +0100
commit6bf98553428a55c903dd2346b786dc558c9ef45c (patch)
treee064f87cd710fa64fc2bb6969c6accdd48b1541e /qemu_mode/patches/afl-qemu-tcg-inl.h
parentd40b6703885b80cbea13ecbb58b48b01ac96b2b0 (diff)
downloadafl++-6bf98553428a55c903dd2346b786dc558c9ef45c.tar.gz
solve typing error on QEMU with host arch i386
Diffstat (limited to 'qemu_mode/patches/afl-qemu-tcg-inl.h')
-rw-r--r--qemu_mode/patches/afl-qemu-tcg-inl.h20
1 files changed, 16 insertions, 4 deletions
diff --git a/qemu_mode/patches/afl-qemu-tcg-inl.h b/qemu_mode/patches/afl-qemu-tcg-inl.h
index e3de09d8..33e0d2a7 100644
--- a/qemu_mode/patches/afl-qemu-tcg-inl.h
+++ b/qemu_mode/patches/afl-qemu-tcg-inl.h
@@ -42,10 +42,15 @@ void tcg_gen_afl_maybe_log_call(target_ulong cur_loc) {
   unsigned sizemask, flags;
   TCGOp *  op;
 
+#if TARGET_LONG_BITS == 64
   TCGTemp *arg = tcgv_i64_temp(tcg_const_tl(cur_loc));
+  sizemask = dh_sizemask(void, 0) | dh_sizemask(i64, 1);
+#else
+  TCGTemp *arg = tcgv_i32_temp(tcg_const_tl(cur_loc));
+  sizemask = dh_sizemask(void, 0) | dh_sizemask(i32, 1);
+#endif
 
   flags = 0;
-  sizemask = dh_sizemask(void, 0) | dh_sizemask(i64, 1);
 
 #if defined(__sparc__) && !defined(__arch64__) && \
     !defined(CONFIG_TCG_INTERPRETER)
@@ -372,19 +377,26 @@ void tcg_gen_afl_call0(void *func) {
 }
 
 void tcg_gen_afl_compcov_log_call(void *func, target_ulong cur_loc,
-                                  TCGv_i64 arg1, TCGv_i64 arg2) {
+                                  TCGv arg1, TCGv arg2) {
 
   int      i, real_args, nb_rets, pi;
   unsigned sizemask, flags;
   TCGOp *  op;
 
   const int nargs = 3;
+#if TARGET_LONG_BITS == 64
   TCGTemp *args[3] = {tcgv_i64_temp(tcg_const_tl(cur_loc)), tcgv_i64_temp(arg1),
                       tcgv_i64_temp(arg2)};
-
-  flags = 0;
   sizemask = dh_sizemask(void, 0) | dh_sizemask(i64, 1) | dh_sizemask(i64, 2) |
              dh_sizemask(i64, 3);
+#else
+  TCGTemp *args[3] = {tcgv_i32_temp(tcg_const_tl(cur_loc)), tcgv_i32_temp(arg1),
+                      tcgv_i32_temp(arg2)};
+  sizemask = dh_sizemask(void, 0) | dh_sizemask(i32, 1) | dh_sizemask(i32, 2) |
+             dh_sizemask(i32, 3);
+#endif
+
+  flags = 0;
 
 #if defined(__sparc__) && !defined(__arch64__) && \
     !defined(CONFIG_TCG_INTERPRETER)