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author | Nguyễn Gia Phong <mcsinyx@disroot.org> | 2020-05-24 16:34:31 +0700 |
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committer | Nguyễn Gia Phong <mcsinyx@disroot.org> | 2020-05-24 16:34:31 +0700 |
commit | b2d80610db6beda38573890ed169815e495bc663 (patch) | |
tree | 176e1bca6fe644c619d53cf1c24682c244b79cf6 /usth/ICT2.7/P3L4 Unified Software Process Subtitles/1 - Lesson Overview - lang_en_vs4.srt | |
parent | 49376ab97c7427f1c1eca64072d1a934c2e52f50 (diff) | |
download | cp-b2d80610db6beda38573890ed169815e495bc663.tar.gz |
[usth/ICT2.7] Engineer software
Diffstat (limited to 'usth/ICT2.7/P3L4 Unified Software Process Subtitles/1 - Lesson Overview - lang_en_vs4.srt')
-rw-r--r-- | usth/ICT2.7/P3L4 Unified Software Process Subtitles/1 - Lesson Overview - lang_en_vs4.srt | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/usth/ICT2.7/P3L4 Unified Software Process Subtitles/1 - Lesson Overview - lang_en_vs4.srt b/usth/ICT2.7/P3L4 Unified Software Process Subtitles/1 - Lesson Overview - lang_en_vs4.srt new file mode 100644 index 0000000..4abf070 --- /dev/null +++ b/usth/ICT2.7/P3L4 Unified Software Process Subtitles/1 - Lesson Overview - lang_en_vs4.srt @@ -0,0 +1,31 @@ +1 +00:00:00,770 --> 00:00:02,830 +In the previous lessons of this mini-course, + +2 +00:00:02,830 --> 00:00:06,620 +we discussed high level design, or architecture, + +3 +00:00:06,620 --> 00:00:12,380 +low level design, and design patterns. Now, we're going to see how we can put + +4 +00:00:12,380 --> 00:00:15,380 +this and also others software engineering activities + +5 +00:00:15,380 --> 00:00:18,436 +together in the context of a UML-based + +6 +00:00:18,436 --> 00:00:21,820 +process model, the unified software process, or + +7 +00:00:21,820 --> 00:00:25,580 +USP. We will discuss how USP was defined, + +8 +00:00:25,580 --> 00:00:30,492 +its main characteristics, its phases, and how we can apply it in practice. |