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authorDanny Milosavljevic <dannym@scratchpost.org>2022-09-16 13:05:25 +0200
committerDanny Milosavljevic <dannym@scratchpost.org>2022-09-16 13:17:08 +0200
commit3ba8c2b5076cff874f12e2880632ec5e5507acff (patch)
tree0cf0f1e801019ac5c3d9994c401b2a9e283bfd5b /gnu/packages/fpga.scm
parenteb9a39c1b75a60fe3946496bb2eee8f32dbf09cd (diff)
downloadguix-3ba8c2b5076cff874f12e2880632ec5e5507acff.tar.gz
gnu: Add openfpgaloader.
* gnu/packages/fpga.scm (openfpgaloader): New variable.
Diffstat (limited to 'gnu/packages/fpga.scm')
-rw-r--r--gnu/packages/fpga.scm29
1 files changed, 28 insertions, 1 deletions
diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index 58b81bf83a..11c56477a8 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -58,7 +58,8 @@
   #:use-module (gnu packages qt)
   #:use-module (gnu packages boost)
   #:use-module (gnu packages algebra)
-  #:use-module (gnu packages libftdi))
+  #:use-module (gnu packages libftdi)
+  #:use-module (gnu packages libusb))
 
 (define-public abc
  (let ((commit "5ae4b975c49c")
@@ -584,3 +585,29 @@ libraries, optionally encrypted, into other simulators.")
 hardware designs in Verilog.")
       (home-page "https://zipcpu.com/")
       (license license:lgpl3+))))
+
+(define-public openfpgaloader
+  (package
+    (name "openfpgaloader")
+    (version "0.9.0")
+    (source (origin
+              (method git-fetch)
+              (uri (git-reference
+                     (url "https://github.com/trabucayre/openFPGALoader.git")
+                     (commit (string-append "v" version))))
+              (file-name (string-append name "-" version "-checkout"))
+              (sha256
+               (base32
+                "1v3bwzhsrnsn304cqhd5azn68cl847qv8w8cb8bl7372jiqz5wqq"))))
+    (build-system cmake-build-system)
+    (native-inputs
+     (list pkg-config))
+    (inputs
+     (list libftdi libusb hidapi zlib))
+    (arguments
+     `(#:tests? #f)) ; No tests exist
+    (synopsis "Utility for programming FPGA")
+    (description "This package provides a program to transfer a bitstream
+to an FPGA.")
+    (home-page "https://f4pga.org/")
+    (license license:asl2.0)))