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-rw-r--r--gnu/packages/fpga.scm6
1 files changed, 3 insertions, 3 deletions
diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index fda5de60c7..b2717d2233 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -127,7 +127,7 @@ For synthesis, the compiler generates netlists in the desired format.")
     (source (origin
               (method git-fetch)
               (uri (git-reference
-                    (url "https://github.com/cliffordwolf/yosys.git")
+                    (url "https://github.com/cliffordwolf/yosys")
                     (commit (string-append "yosys-" version))
                     (recursive? #t))) ; for the ‘iverilog’ submodule
               (sha256
@@ -223,7 +223,7 @@ For synthesis, the compiler generates netlists in the desired format.")
     (source (origin
               (method git-fetch)
               (uri (git-reference
-                     (url "https://github.com/cliffordwolf/icestorm.git")
+                     (url "https://github.com/cliffordwolf/icestorm")
                      (commit commit)))
               (file-name (git-file-name name version))
               (sha256
@@ -304,7 +304,7 @@ FOSS FPGA place and route tool.")
     (source (origin
               (method git-fetch)
               (uri (git-reference
-                     (url "https://github.com/YosysHQ/arachne-pnr.git")
+                     (url "https://github.com/YosysHQ/arachne-pnr")
                      (commit commit)))
               (file-name (git-file-name name version))
               (sha256