prefix register macros

3 files changed, 15 insertions, 15 deletions

diff --git a/lisc/emit.c b/lisc/emit.c
index 2e37d64..cd82c0a 100644
--- a/lisc/emit.c
+++ b/lisc/emit.c
@@ -35,7 +35,7 @@ static char *rtoa[] = {
 	[R15D] = "r15d",
 };
 
-enum { SSHORT, SBYTE };
+enum { SShort, SByte };
 static char *rsub[][2] = {
 	[RXX] = {"OH GOD!", "OH NO!"},
 	[RAX] = {"ax", "al"},
@@ -128,7 +128,7 @@ emem(Ref r, Fn *fn, FILE *f)
 		econ(&fn->con[r.val], f);
 		break;
 	case RReg:
-		assert(BASE(r.val) == r.val);
+		assert(r.val < EAX);
 		fprintf(f, "(");
 		eref(r, fn, f);
 		fprintf(f, ")");
@@ -198,7 +198,7 @@ eins(Ins i, Fn *fn, FILE *f)
 	case OStoreb:
 		fprintf(f, "\tmov%s ", stoa[i.op - OStore]);
 		if (rtype(i.arg[0]) == RReg) {
-			r = BASE(i.arg[0].val);
+			r = RBASE(i.arg[0].val);
 			fprintf(f, "%%%s", rsub[r][i.op - OStores]);
 		} else
 			eref(i.arg[0], fn, f);
@@ -213,7 +213,7 @@ eins(Ins i, Fn *fn, FILE *f)
 	case OLoadsb:
 	case OLoadub:
 		fprintf(f, "\t%s", otoa[i.op]);
-		if (BASE(i.to.val) == i.to.val)
+		if (i.to.val < EAX)
 			fprintf(f, "q ");
 		else
 			fprintf(f, "l ");
@@ -248,7 +248,7 @@ eins(Ins i, Fn *fn, FILE *f)
 			eop("mov $0,", i.to, R, fn, f);
 			fprintf(f, "\tset%s %%%s\n",
 				ctoa[i.op-OXSet],
-				rsub[BASE(i.to.val)][SBYTE]);
+				rsub[RBASE(i.to.val)][SByte]);
 			break;
 		}
 		diag("emit: unhandled instruction (3)");
diff --git a/lisc/lisc.h b/lisc/lisc.h
index 2caadc4..e57582d 100644
--- a/lisc/lisc.h
+++ b/lisc/lisc.h
@@ -60,8 +60,8 @@ enum {
 	NReg = 3 /* for test purposes */
 };
 
-#define WORD(r) (r + (EAX-RAX))
-#define BASE(r) (r >= EAX ? r - (EAX-RAX) : r)
+#define RWORD(r) (r + (EAX-RAX))
+#define RBASE(r) (r < EAX ? r : r - (EAX-RAX))
 
 enum {
 	NString = 32,
diff --git a/lisc/rega.c b/lisc/rega.c
index b1eabcb..ea26417 100644
--- a/lisc/rega.c
+++ b/lisc/rega.c
@@ -35,7 +35,7 @@ reg(int r, int t)
 	default:
 		assert(!"invalid temporary");
 	case TWord:
-		return REG(WORD(r));
+		return REG(RWORD(r));
 	case TLong:
 		return REG(r);
 	}
@@ -205,7 +205,7 @@ dopm(Blk *b, Ins *i, RMap *m)
 	i1 = i+1;
 	if (rtype(i->to) == RReg)
 		for (;; i--) {
-			r = BASE(i->to.val);
+			r = RBASE(i->to.val);
 			rt = i->arg[0];
 			assert(rtype(rt) == RTmp);
 			assert(BGET(m->br, r));
@@ -220,7 +220,7 @@ dopm(Blk *b, Ins *i, RMap *m)
 		}
 	else if (rtype(i->arg[0]) == RReg)
 		for (;; i--) {
-			r = BASE(i->arg[0].val);
+			r = RBASE(i->arg[0].val);
 			assert(req(i->to, R) || i->to.type == RTmp);
 			if (req(i->to, R)) {
 				if (BGET(m->br, r)) {
@@ -285,10 +285,10 @@ rega(Fn *fn)
 				continue;
 			if (rtype(i->arg[0]) == RTmp
 			&& rtype(i->to) == RReg)
-				tmp[i->arg[0].val].hint = BASE(i->to.val);
+				tmp[i->arg[0].val].hint = RBASE(i->to.val);
 			if (rtype(i->to) == RTmp
 			&& rtype(i->arg[0]) == RReg)
-				tmp[i->to.val].hint = BASE(i->arg[0].val);
+				tmp[i->to.val].hint = RBASE(i->arg[0].val);
 		}
 
 	/* 2. assign registers backwards */
@@ -343,7 +343,7 @@ rega(Fn *fn)
 				i->to = reg(r, i->to.val);
 				break;
 			case RReg:
-				r = BASE(i->to.val);
+				r = RBASE(i->to.val);
 				assert(BGET(cur.br, r));
 				BCLR(cur.br, r);
 				break;
@@ -363,7 +363,7 @@ rega(Fn *fn)
 				i->arg[0] = ralloc(&cur, t);
 				break;
 			case RReg:
-				BSET(cur.br, BASE(i->arg[0].val));
+				BSET(cur.br, RBASE(i->arg[0].val));
 				break;
 			}
 			switch (rtype(i->arg[1])) {
@@ -372,7 +372,7 @@ rega(Fn *fn)
 				i->arg[1] = ralloc(&cur, t);
 				break;
 			case RReg:
-				BSET(cur.br, BASE(i->arg[1].val));
+				BSET(cur.br, RBASE(i->arg[1].val));
 				break;
 			}
 		}