drop -G flag and add target amd64_apple

apple support is more than assembly syntax
in case of arm64 machines, and apple syntax
is currently useless in all cases but amd64;
rather than having a -G option that only
makes sense with amd64, we add a new target
amd64_apple

4 files changed, 53 insertions, 25 deletions

diff --git a/amd64/all.h b/amd64/all.h
index 3a2db0e..f6ad227 100644
--- a/amd64/all.h
+++ b/amd64/all.h
@@ -67,4 +67,5 @@ void amd64_sysv_abi(Fn *);
 void amd64_isel(Fn *);
 
 /* emit.c */
-void amd64_emitfn(Fn *, FILE *);
+void amd64_sysv_emitfn(Fn *, FILE *);
+void amd64_apple_emitfn(Fn *, FILE *);
diff --git a/amd64/emit.c b/amd64/emit.c
index b8e9e8e..db6ead8 100644
--- a/amd64/emit.c
+++ b/amd64/emit.c
@@ -166,7 +166,7 @@ emitcon(Con *con, FILE *f)
 	switch (con->type) {
 	case CAddr:
 		l = str(con->label);
-		p = con->local ? gasloc : l[0] == '"' ? "" : gassym;
+		p = con->local ? T.asloc : l[0] == '"' ? "" : T.assym;
 		fprintf(f, "%s%s", p, l);
 		if (con->bits.i)
 			fprintf(f, "%+"PRId64, con->bits.i);
@@ -425,8 +425,8 @@ emitins(Ins i, Fn *fn, FILE *f)
 			fprintf(f,
 				"\txorp%c %sfp%d(%%rip), %%%s\n",
 				"xxsd"[i.cls],
-				gasloc,
-				gasstash(negmask[i.cls], 16),
+				T.asloc,
+				stashbits(negmask[i.cls], 16),
 				regtoa(i.to.val, SLong)
 			);
 		break;
@@ -535,8 +535,8 @@ framesz(Fn *fn)
 	return 4*f + 8*o + 176*fn->vararg;
 }
 
-void
-amd64_emitfn(Fn *fn, FILE *f)
+static void
+emitfn(Fn *fn, FILE *f)
 {
 	static char *ctoa[] = {
 	#define X(c, s) [c] = s,
@@ -549,7 +549,7 @@ amd64_emitfn(Fn *fn, FILE *f)
 	int *r, c, o, n, lbl;
 	uint64_t fs;
 
-	gasemitlnk(fn->name, &fn->lnk, ".text", f);
+	emitlnk(fn->name, &fn->lnk, ".text", f);
 	fputs("\tpushq %rbp\n\tmovq %rsp, %rbp\n", f);
 	fs = framesz(fn);
 	if (fs)
@@ -570,7 +570,7 @@ amd64_emitfn(Fn *fn, FILE *f)
 
 	for (lbl=0, b=fn->start; b; b=b->link) {
 		if (lbl || b->npred > 1)
-			fprintf(f, "%sbb%d:\n", gasloc, id0+b->id);
+			fprintf(f, "%sbb%d:\n", T.asloc, id0+b->id);
 		for (i=b->ins; i!=&b->ins[b->nins]; i++)
 			emitins(*i, fn, f);
 		lbl = 1;
@@ -596,7 +596,7 @@ amd64_emitfn(Fn *fn, FILE *f)
 		Jmp:
 			if (b->s1 != b->link)
 				fprintf(f, "\tjmp %sbb%d\n",
-					gasloc, id0+b->s1->id);
+					T.asloc, id0+b->s1->id);
 			else
 				lbl = 0;
 			break;
@@ -610,7 +610,7 @@ amd64_emitfn(Fn *fn, FILE *f)
 				} else
 					c = cmpneg(c);
 				fprintf(f, "\tj%s %sbb%d\n", ctoa[c],
-					gasloc, id0+b->s2->id);
+					T.asloc, id0+b->s2->id);
 				goto Jmp;
 			}
 			die("unhandled jump %d", b->jmp.type);
@@ -618,3 +618,16 @@ amd64_emitfn(Fn *fn, FILE *f)
 	}
 	id0 += fn->nblk;
 }
+
+void
+amd64_sysv_emitfn(Fn *fn, FILE *f)
+{
+	emitfn(fn, f);
+	elf_emitfnfin(fn->name, f);
+}
+
+void
+amd64_apple_emitfn(Fn *fn, FILE *f)
+{
+	emitfn(fn, f);
+}
diff --git a/amd64/isel.c b/amd64/isel.c
index 5a64429..640bf12 100644
--- a/amd64/isel.c
+++ b/amd64/isel.c
@@ -79,7 +79,7 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
 		memset(&a, 0, sizeof a);
 		a.offset.type = CAddr;
 		a.offset.local = 1;
-		n = gasstash(&fn->con[r0.val].bits, KWIDE(k) ? 8 : 4);
+		n = stashbits(&fn->con[r0.val].bits, KWIDE(k) ? 8 : 4);
 		sprintf(buf, "fp%d", n);
 		a.offset.label = intern(buf);
 		fn->mem[fn->nmem-1] = a;
diff --git a/amd64/targ.c b/amd64/targ.c
index 2cf1bdc..e58ba2f 100644
--- a/amd64/targ.c
+++ b/amd64/targ.c
@@ -12,20 +12,34 @@ amd64_memargs(int op)
 	return amd64_op[op].nmem;
 }
 
+#define AMD64_COMMON \
+	.gpr0 = RAX, \
+	.ngpr = NGPR, \
+	.fpr0 = XMM0, \
+	.nfpr = NFPR, \
+	.rglob = BIT(RBP) | BIT(RSP), \
+	.nrglob = 2, \
+	.rsave = amd64_sysv_rsave, \
+	.nrsave = {NGPS, NFPS}, \
+	.retregs = amd64_sysv_retregs, \
+	.argregs = amd64_sysv_argregs, \
+	.memargs = amd64_memargs, \
+	.abi = amd64_sysv_abi, \
+	.isel = amd64_isel, \
+
 Target T_amd64_sysv = {
 	.name = "amd64_sysv",
-	.gpr0 = RAX,
-	.ngpr = NGPR,
-	.fpr0 = XMM0,
-	.nfpr = NFPR,
-	.rglob = BIT(RBP) | BIT(RSP),
-	.nrglob = 2,
-	.rsave = amd64_sysv_rsave,
-	.nrsave = {NGPS, NFPS},
-	.retregs = amd64_sysv_retregs,
-	.argregs = amd64_sysv_argregs,
-	.memargs = amd64_memargs,
-	.abi = amd64_sysv_abi,
-	.isel = amd64_isel,
-	.emitfn = amd64_emitfn,
+	.emitfn = amd64_sysv_emitfn,
+	.emitfin = elf_emitfin,
+	.asloc = ".L",
+	AMD64_COMMON
+};
+
+Target T_amd64_apple = {
+	.name = "amd64_apple",
+	.emitfn = amd64_apple_emitfn,
+	.emitfin = macho_emitfin,
+	.asloc = "L",
+	.assym = "_",
+	AMD64_COMMON
 };