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| author | Michael Forney <mforney@mforney.org> | 2021-03-11 19:24:28 -0800 |
|---|---|---|
| committer | Quentin Carbonneaux <quentin@c9x.me> | 2021-03-18 12:43:49 +0100 |
| commit | e0b94a3d6ade2f99ded481318e9e6d9f16953662 (patch) | |
| tree | 2570c110b56de93f491b84e29438fd0434cf26ac /amd64 | |
| parent | 097dc86c45cc2f20cf98ec0385dbb57aaba419ec (diff) | |
| download | roux-e0b94a3d6ade2f99ded481318e9e6d9f16953662.tar.gz | |
spill: use stronger assertion for registers in use at start of function
Diffstat (limited to 'amd64')
| -rw-r--r-- | amd64/sysv.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/amd64/sysv.c b/amd64/sysv.c index 3125069..045ec85 100644 --- a/amd64/sysv.c +++ b/amd64/sysv.c @@ -427,6 +427,7 @@ selpar(Fn *fn, Ins *i0, Ins *i1) fa = argsclass(i0, i1, ac, Opar, &aret, &env); } else fa = argsclass(i0, i1, ac, Opar, 0, &env); + fn->reg = amd64_sysv_argregs(CALL(fa), 0); for (i=i0, a=ac; i<i1; i++, a++) { if (i->op != Oparc || a->inmem) |