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| author | Michael Forney <mforney@mforney.org> | 2021-03-26 14:39:55 +0100 |
|---|---|---|
| committer | Quentin Carbonneaux <quentin@c9x.me> | 2021-10-26 01:08:19 +0200 |
| commit | fd33b2ef25ff55217e229666c4d2f0877aac2515 (patch) | |
| tree | ce26c3a3bacf3146daef894464170e4a48855659 /arm64/targ.c | |
| parent | 5e0ba156116036ba42d7ce8e361004ea20fb2d6b (diff) | |
| download | roux-fd33b2ef25ff55217e229666c4d2f0877aac2515.tar.gz | |
arm64: Add LR to list of registers to save
Tested-by: Thomas Bracht Laumann Jespersen <t@laumann.xyz> Fixes: https://todo.sr.ht/~sircmpwn/hare/312
Diffstat (limited to 'arm64/targ.c')
| -rw-r--r-- | arm64/targ.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arm64/targ.c b/arm64/targ.c index ead6932..99c4347 100644 --- a/arm64/targ.c +++ b/arm64/targ.c @@ -3,7 +3,7 @@ int arm64_rsave[] = { R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, - IP0, IP1, R18, + IP0, IP1, R18, LR, V0, V1, V2, V3, V4, V5, V6, V7, V16, V17, V18, V19, V20, V21, V22, V23, V24, V25, V26, V27, V28, V29, V30, |