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authorQuentin Carbonneaux <quentin.carbonneaux@yale.edu>2015-11-30 17:11:18 -0500
committerQuentin Carbonneaux <quentin.carbonneaux@yale.edu>2015-11-30 17:11:42 -0500
commit891877d67d8e5e46b8094f7b6ba69957e844a5d0 (patch)
tree157887fbb4be327e97288b0945553c188befe1dc /lisc/FP
parent839dca331a339d8beec727a6ffd0740ad4f5e13a (diff)
downloadroux-891877d67d8e5e46b8094f7b6ba69957e844a5d0.tar.gz
plan work on isel
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+Instructions classification:
+FP    : add, sub, mul, sdiv, copy, par, arg
+Maybe : and, or, xor, cmp(6)
+Non FP: udiv, srem, urem, store(4), load(7),
+        ext(7), alloc(5), parc, argc, call
+
+15 bits for operations  32768
+-1 bit for s,d          16384
+
+New conversion instructions:
+ - Bitcast conversion between fp and ints. cast
+ - Convert fp to/from int. ftosi sitof (only signed at first, truncation)
+ - Convert single to/from double fconv
+
+Summary:
+	Add cast, ftosi sitof, fconv
+	Add a 'floating point' bit to instructions
+	Conversions from/to unsigned types are hard!
+	I need to find a reference for that.
+
+Problem with "cls" field: for comparisons, this field is
+for the argument of the instruction, but, in the case of
+Load (for example), it is about the result.
+
+Roadmap in isel.
+	Make sure all floating point immediates are accessed
+	through a memory load.  The load can be fused in some
+	instructions (add, sub, mul, div).  This should be
+	handled similarly to the large integer constants.
+
+	Complete ABI implementation, we should only need the
+	movsd instruction to transfer between sse registers and
+	memory.