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authorQuentin Carbonneaux <quentin.carbonneaux@yale.edu>2015-10-23 17:32:09 -0400
committerQuentin Carbonneaux <quentin.carbonneaux@yale.edu>2015-10-30 13:20:42 -0400
commit6d264a2594d286fb513ff89afc6b984033ee4cda (patch)
treef2b2c91a14f2d259d4a97dc031ce1329c3661cc4 /lisc
parentaa5682480c30044c2ffe807ce1316ef7cdcb5e24 (diff)
downloadroux-6d264a2594d286fb513ff89afc6b984033ee4cda.tar.gz
port rega.c to work with RAMem
Diffstat (limited to 'lisc')
-rw-r--r--lisc/rega.c19
1 files changed, 15 insertions, 4 deletions
diff --git a/lisc/rega.c b/lisc/rega.c
index 6bd72ef..d6b39ec 100644
--- a/lisc/rega.c
+++ b/lisc/rega.c
@@ -15,6 +15,7 @@ struct RMap {
static ulong regu; /* registers used */
static Tmp *tmp; /* function temporaries */
+static Mem *mem; /* function mem references */
static struct {
Ref src, dst;
int wide;
@@ -278,6 +279,7 @@ doblk(Blk *b, RMap *cur)
int t, x, r;
ulong rs;
Ins *i;
+ Mem *m;
if (rtype(b->jmp.arg) == RTmp)
b->jmp.arg = ralloc(cur, b->jmp.arg.val);
@@ -310,16 +312,23 @@ doblk(Blk *b, RMap *cur)
r = 0;
break;
}
- for (x=0; x<2; x++)
- if (rtype(i->arg[x]) == RTmp) {
+ for (x=0; t=i->arg[x].val, x<2; x++)
+ switch (rtype(i->arg[x])) {
+ case RAMem:
+ m = &mem[t & AMask];
+ if (rtype(m->base) == RTmp)
+ m->base = ralloc(cur, m->base.val);
+ if (rtype(m->index) == RTmp)
+ m->index = ralloc(cur, m->index.val);
+ break;
+ case RTmp:
+#if 0
/* <arch>
* on Intel, we attempt to
* use the same register
* for the return and one
* argument
*/
- t = i->arg[x].val;
-#if 0
/* might not be a so good idea...
*/
if (r && !BGET(cur->b, r))
@@ -327,6 +336,7 @@ doblk(Blk *b, RMap *cur)
*hint(t) = r;
#endif
i->arg[x] = ralloc(cur, t);
+ break;
}
}
}
@@ -347,6 +357,7 @@ rega(Fn *fn)
/* 1. setup */
regu = 0;
tmp = fn->tmp;
+ mem = fn->mem;
end = alloc(fn->nblk * sizeof end[0]);
beg = alloc(fn->nblk * sizeof beg[0]);
for (t=Tmp0; t<fn->ntmp; t++)