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| author | Quentin Carbonneaux <quentin@c9x.me> | 2021-08-30 09:31:57 +0200 |
|---|---|---|
| committer | Quentin Carbonneaux <quentin@c9x.me> | 2021-08-30 09:31:57 +0200 |
| commit | 028534d9897079bf64559dca0402bc59a956ce46 (patch) | |
| tree | 61f21efe488c57d3c14947a54e7db84fbed71e7a /rega.c | |
| parent | 7ac88f5d4874f03d62f48055eded26e9a08e54ac (diff) | |
| download | roux-028534d9897079bf64559dca0402bc59a956ce46.tar.gz | |
skip jump arguments in rega
On both amd64 & arm64, the jumps making it to rega won't have any argument.
Diffstat (limited to 'rega.c')
| -rw-r--r-- | rega.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/rega.c b/rega.c index 7547293..bd26f1c 100644 --- a/rega.c +++ b/rega.c @@ -359,10 +359,9 @@ doblk(Blk *b, RMap *cur) Mem *m; Ref *ra[4]; + assert(rtype(b->jmp.arg) != RTmp); for (r=0; bsiter(b->out, &r) && r<Tmp0; r++) radd(cur, r, r); - if (rtype(b->jmp.arg) == RTmp) - b->jmp.arg = ralloc(cur, b->jmp.arg.val); curi = &insb[NIns]; for (i1=&b->ins[b->nins]; i1!=b->ins;) { emiti(*--i1); |