summary refs log tree commit diff
path: root/rega.c
diff options
context:
space:
mode:
authorQuentin Carbonneaux <quentin@c9x.me>2017-03-29 00:16:46 -0400
committerQuentin Carbonneaux <quentin@c9x.me>2017-03-29 00:16:46 -0400
commit81e2fdacc536dab7ad3c1e1da313b80f5ae935b7 (patch)
tree91768d923da523502211c3c0b130351580852abb /rega.c
parent02408ffd8f95a4334212e1d64de987f9192cb4d5 (diff)
downloadroux-81e2fdacc536dab7ad3c1e1da313b80f5ae935b7.tar.gz
improve global registers handling
The register allocation now has stricter assertions
about global registers.  The stricter assertions
required changes in the spiller:  We now correctly
indicate to the register allocator what registers
are used by "ret" instructions.
Diffstat (limited to 'rega.c')
-rw-r--r--rega.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/rega.c b/rega.c
index 9f02a63..3d83327 100644
--- a/rega.c
+++ b/rega.c
@@ -135,6 +135,7 @@ rfree(RMap *m, int t)
 {
 	int i, r;
 
+	assert(t >= Tmp0 || !(BIT(t) & RGLOB));
 	if (!bshas(m->b, t))
 		return -1;
 	for (i=0; m->t[i] != t; i++)
@@ -145,6 +146,7 @@ rfree(RMap *m, int t)
 	m->n--;
 	memmove(&m->t[i], &m->t[i+1], (m->n-i) * sizeof m->t[0]);
 	memmove(&m->r[i], &m->r[i+1], (m->n-i) * sizeof m->r[0]);
+	assert(t >= Tmp0 || t == r);
 	return r;
 }
 
@@ -385,13 +387,15 @@ doblk(Blk *b, RMap *cur)
 		default:
 			if (!req(i->to, R)) {
 				assert(rtype(i->to) == RTmp);
-				r = rfree(cur, i->to.val);
-				if (r == -1 && !isreg(i->to)) {
+				r = i->to.val;
+				if (r >= Tmp0 || !(BIT(r) & RGLOB))
+					r = rfree(cur, r);
+				if (r == -1) {
+					assert(!isreg(i->to));
 					*i = (Ins){.op = Onop};
 					continue;
 				}
-				if (i->to.val >= Tmp0)
-					i->to = TMP(r);
+				i->to = TMP(r);
 			}
 			break;
 		}