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path: root/lisc/rega.c
AgeCommit message (Expand)Author
2015-10-06add pool memory managementQuentin Carbonneaux
2015-10-06specialize vdup into idupQuentin Carbonneaux
2015-10-06factor ins array edition in icpyQuentin Carbonneaux
2015-10-05factor vector duplication in vdup()Quentin Carbonneaux
2015-10-05rename blocka to ballocQuentin Carbonneaux
2015-10-05factor some utility functions/data in util.cQuentin Carbonneaux
2015-10-05clean the command line interfaceQuentin Carbonneaux
2015-09-29wip on new stack slots (emit, spill)Quentin Carbonneaux
2015-09-28stupid hinting works better without traces!Quentin Carbonneaux
2015-09-25fresh new trace based allocator (needs tuning)Quentin Carbonneaux
2015-09-25prepare rega for trace-based allocationQuentin Carbonneaux
2015-09-22do not do dce on register assignmentsQuentin Carbonneaux
2015-09-21fix rega bug for indirect callsQuentin Carbonneaux
2015-09-20save callee-save registersQuentin Carbonneaux
2015-09-15fix call bug in regaQuentin Carbonneaux
2015-09-15heavy modification of call handlingQuentin Carbonneaux
2015-09-15more modifications to regaQuentin Carbonneaux
2015-09-15add a size to all operations (wip)Quentin Carbonneaux
2015-09-15my assumptions in dopm() were wrongQuentin Carbonneaux
2015-09-15simplify rega's dopm()Quentin Carbonneaux
2015-09-15update dopm()Quentin Carbonneaux
2015-09-15add helpful diagnosticsQuentin Carbonneaux
2015-09-15add test scaffolding codeQuentin Carbonneaux
2015-09-15work in progress on parallel movesQuentin Carbonneaux
2015-09-15fix two bugs in regaQuentin Carbonneaux
2015-09-15remove dead code from regaQuentin Carbonneaux
2015-09-15treat two instruction args uniformly in regaQuentin Carbonneaux
2015-09-15tweak block-border heuristic for reg. allocationQuentin Carbonneaux
2015-09-15refine the clobber codeQuentin Carbonneaux
2015-09-15fix two heuristics in regaQuentin Carbonneaux
2015-09-15remove round-robin in ralloc (need preferences)Quentin Carbonneaux
2015-09-15clobber check code was wrong in dopm()Quentin Carbonneaux
2015-09-15fix bug in parallel moves codeQuentin Carbonneaux
2015-09-15avoid depending on uninitialized rQuentin Carbonneaux
2015-09-15use the same bitset for regs and tmps in rega()Quentin Carbonneaux
2015-09-15major lifting: get rid of RRegQuentin Carbonneaux
2015-09-15prefix register macrosQuentin Carbonneaux
2015-09-15use round-robin in rallocQuentin Carbonneaux
2015-09-15simplify frequent pred detection in regaQuentin Carbonneaux
2015-09-15fix 2 bad bugs in rega and improve substractionQuentin Carbonneaux
2015-09-15use correct sizes during reg allocationQuentin Carbonneaux
2015-09-15use a new Ref type for registersQuentin Carbonneaux
2015-09-15start work on word/long handlingQuentin Carbonneaux
2015-09-15clean the commutativity + fix bug in emitQuentin Carbonneaux
2015-09-15add support for in-block reg. contraintsQuentin Carbonneaux
2015-09-15add crippled dce to the allocatorQuentin Carbonneaux
2015-09-15complete a crude register allocatorQuentin Carbonneaux
2015-09-15start work on parallel movesQuentin Carbonneaux
2015-09-15initiate work on reg allocationQuentin Carbonneaux
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