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2018-04-26Fix compiler warnings.Emil Skoeldberg
Compiler warned about comparison between signed and unsigned values.
2017-05-16new hinting in the register allocatorQuentin Carbonneaux
The previous heuristics were ad hoc and it was hard to understand why they worked at all. This patch can be summarized in three points: 1. When a register is freed (an instruction assigns it), we try to find if a temporary would like to be in it, and if we find one, we move it in the newly freed register. I call this an "eager move". 2. Temporaries now remember in what register they were last allocated; this information is stored in the field Tmp.visit, and prevails on the field Tmp.hint when it is set. (This makes having the same hint for interfering temporaries not so disastrous.) 3. Blocks are now allocated in "onion" order, from the innermost loop to the outermost. This is the change I am the least sure about; it should be evaluated thorougly.
2017-04-08prepare for multi-targetQuentin Carbonneaux
This big diff does multiple changes to allow the addition of new targets to qbe. The changes are listed below in decreasing order of impact. 1. Add a new Target structure. To add support for a given target, one has to implement all the members of the Target structure. All the source files where changed to use this interface where needed. 2. Single out amd64-specific code. In this commit, the amd64 target T_amd64_sysv is the only target available, it is implemented in the amd64/ directory. All the non-static items in this directory are prefixed with either amd64_ or amd64_sysv (for items that are specific to the System V ABI). 3. Centralize Ops information. There is now a file 'ops.h' that must be used to store all the available operations together with their metadata. The various targets will only select what they need; but it is beneficial that there is only *one* place to change to add a new instruction. One good side effect of this change is that any operation 'xyz' in the IL now as a corresponding 'Oxyz' in the code. 4. Misc fixes. One notable change is that instruction selection now generates generic comparison operations and the lowering to the target's comparisons is done in the emitter. GAS directives for data are the same for many targets, so data emission was extracted in a file 'gas.c'. 5. Modularize the Makefile. The Makefile now has a list of C files that are target-independent (SRC), and one list of C files per target. Each target can also use its own 'all.h' header (for example to define registers).
2017-03-29improve global registers handlingQuentin Carbonneaux
The register allocation now has stricter assertions about global registers. The stricter assertions required changes in the spiller: We now correctly indicate to the register allocator what registers are used by "ret" instructions.
2017-02-08make rsp and rbp globally liveQuentin Carbonneaux
2017-02-06use uint for block idsQuentin Carbonneaux
2016-04-20match jumps/ops with il textQuentin Carbonneaux
2016-04-08prevent gcc warning in regaQuentin Carbonneaux
2016-04-05use bsiter() for better performanceQuentin Carbonneaux
2016-04-04fat il!Quentin Carbonneaux
2016-04-01cheap massive performance gain on brainfuckQuentin Carbonneaux
2016-03-31cleanup error handlingQuentin Carbonneaux
2016-03-29new layout, put LICENSE in rootQuentin Carbonneaux